The Ministry for Electronics and Informational Technology (MEITY) announced an incentive scheme in December 2021 to boost the semiconductor ecosystem in India. With initial overlay of Rs 76,000 crore, the scheme had provisions to provide financial incentives ranging from 30-50 percent of either the total project cost, or the capital expenditure depending on the type of manufacturing facility proposed.
On September 21, the Union Cabinet approved modifications to the scheme. Notably, different kinds of manufacturing units such as packaging units or compound semiconductors fabs, as well as silicon fabs of all technology nodes are now eligible for up to 50 percent incentives from the Centre. Incentives continue to be upfront on pari-passu basis subject to approval.
As per the ministry, there is now a realisation and acceptance that chips made using the so-called trailing edge nodes still have a healthy market, and are key in the Indian context for variety of applications in automotive, power electronics, consumer electronics, and in certain aspects of smartphones and other communication modules.
Technology node — or process node as it is usually referred to, in the semiconductor industry in general and in semiconductor fabrication facilities or fabs in particular — traditionally indicate the effective length of the channel that conducts electrons from source to drain in a transistor, controlled by the voltage applied to the gate. Smaller this dimension, faster can be the electron movement as well as the switching speed of the transistor. Moreover, the shrinkage in the channel length will correspondingly help shrink other dimensions horizontally and vertically thereby being able to arrange more transistors in the same area, and reduce the power needed.
Industry often talks about advanced nodes and trailing edge nodes, or sometimes even a three-way classification of advanced, mature, and legacy nodes. There is no standard demarcation on which node is what, and it also changes with time as smaller and smaller nanometer (nm) nodes come into the market once in almost every two years. As things stand today, one could say that 90nm and older could be called legacy nodes, below 90 nm and up to about 10 nm can be called mature nodes, and the sub-10nm ones (like 7nm, 5nm, and 3nm) as advanced nodes.
The incentive policy asks for a minimum capacity of 40,000 wafers per month, and rightly so as high investments can give good return only if run at high utilisation. Also, the overall efficiency of a fab is better at higher capacity. In other words, economies of scale play a big role.
The amount of investment needed increases from legacy nodes to mature nodes, and jumps manifold for advanced nodes. Part of the reason is that the cost of the equipment needed for one of the key steps in the process, namely photolithography, increases in orders of magnitude for ranges like 250 to 130 nm, 110 to 65 nm, 45 to 12 nm, and then sub-10nm. For 40,000 capacity, a few tens of specific lithography tools will be needed for the critical layers in those ranges, plus a few tens of older generation tools to do larger dimension layers.
From the point of view of both the financial capability, and the technological capability, India stands a chance of getting more mature node fab applicants than advanced node fab applicants. Whether legacy node applicants will show interest to open new fabs in India will have to be seen.
Even though legacy node chips still hold a good share globally in terms of volumes, the profit margins per chip are small, except the ones for certain specialty applications. The policy asks for a minimum investment of Rs 20,000 crore to help attract only serious players. Even with a good percentage as incentives, breaking even by producing legacy node chips with low profit margins may not be easy.
However, it may open up some interesting possibilities. The SemiConductor Lab at Mohali, which is India’s first and currently the only fab with industry grade equipment has 180nm technology. With the policy update now accepting legacy node applications as well, the SCL can perhaps even be considered as technology partner in a joint venture with say an Indian business house interested in commercialising the already existing facility.
Policies and updates to the same are only facilitators. Ultimately the key will be in due diligence, and quick actions. Three applications for silicon fabs have been in review for over seven months now; it is high time MEITY took a decision, and reopened the scheme for more.
Arun Mampazhy is a semiconductor engineer. Twitter: @nano_arun. Views are personal, and do not represent the stand of this publication.
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